The manufacture of integrated circuit devices involves the formation of n-wells, or regions, in a p-type substrate that are doped with an n-type impurity such as Phosphorus. These regions form the site where a p-channel transistor will be fabricated, while the regions lying outside of n-wells (called p-wells) provide a site for fabricating n-channel transistors. Both n-channel and p-channel transistors are required to implement CMOS technology.
The manufacture of integrated circuits involves the formation of active regions that are by separated distances of about 1.mu. or greater by field oxide layers with thicknesses on the order of 400-1200 nm. Transistors and other electrical structures are formed in the active regions. The field oxide provides for electrical isolation between separate and distinct electrical device regions on a die.
As the state of the art advances, a greater number of circuit components are to be provided on smaller surface areas of the die. However, as die size and die separation are reduced, it becomes increasingly difficult to maintain electrical isolation between electronic components formed on the die, due principally to the problem of diffusion of materials in a lateral direction when diffusion principally in the vertical direction is desired. The problem of lateral diffusion is particularly pertinent after implantation of the Boron channel stop, as the Boron tends to diffuse laterally from the silicon region under the field oxide layer into the active region where circuits are to be formed. The presence of Boron at the sides of the active region results in a diminution of the electrical channel width, resulting in reduced transistor drive current and increased N+ junction capacitance. Accordingly, it is desirable to minimize the extent of lateral diffusion of the Boron and other implants during field oxide formation.
It is well known that Boron, as well as Phosphorus, diffuses predominantly by interactions with silicon interstitials. However, Antimony is known to diffuse principally through interactions with lattice vacancies. Therefore, the manner in which the dopant diffuses into the semiconductor device affects not only the structure of the adjacent active regions into which the dopant diffuses, but also the measures that one can take to minimize the extent of dopant diffusion. For example, measures taken to inhibit Boron or Phosphorus lateral diffusion could not be expected to significantly impact upon lateral diffusion of Antimony, as Antimony diffuses by way of a different mechanism (vacancies) as opposed to Boron and Phosphorus (interstitials).
In conventional CMOS manufacture, the active regions are formed by a local oxidation process in which a thin layer of SiO.sub.2 is grown in a diffusion furnace and a silicon nitride (Si.sub.3 N.sub.4) layer is deposited by low pressure chemical vapor deposition ("LPCVD") over the SiO.sub.2. The oxide/nitride stack functions as an oxidation blocking layer above what will become the active region of the device. Photoresist is applied to the top layer of the stack to define an active area pattern. The nitride layer is then plasma-etched using CF.sub.4 or CF.sub.4 -based chemistry, for example. Alter the photoresist is removed, the wafer is oxidized to grow a thick field oxide in areas not protected by nitride. A field oxide layer is developed outside of the blocking layer. Prior to development of the field oxide, Boron is implanted into areas where the field oxide is to be grown, but not into active regions which are covered by an oxide/nitride/photoresist stack. However, as the Boron is driven vertically into the semiconductor device, the Boron freely diffuses laterally (by interstitials) into the active region, compromising region integrity for the development of circuit devices.
The problem of dopant diffusion during well drive-in is well documented. Lateral dopant diffusion of approximately 80% well depth is acknowledged in CMOS Well Drive-In NH.sub.3 for Reduced Lateral Diffusion and Heat Cycle, IEEE Electron Device Letters, v. ed1-6, no. 12, Dec. 1985. The stated consequence of such undesired diffusion is an increase in the spacing requirement between the well and complementary MOSFET's outside of the well. The article reports retardation of lateral diffusion through the use of an ammonia ambient. In the disclosed process, a 150 nm-thick CVD Si.sub.3 N.sub.4 layer is deposited on a 40 nm-thick stress-relief thermal SiO.sub.2 layer. The Si.sub.3 N.sub.4 layer is patterned and etched to define well regions that are then implanted with Phosphorus prior to removal of a photoresist layer from the surrounding region of the device. A 100 nm-thick SiO.sub.2 layer is thermally grown in the well regions, after which the Si.sub.3 N.sub.4 layer is removed with phosphoric acid. A dilute HF solution is applied to the SiO.sub. 2, which removes approximately 50 nm of SiO.sub.2 for well drive-in. The disclosed drive-in is performed at 1,125.degree. C. in either an N.sub.2 or an NH.sub.3 ambient. With reference to the ammonia ambient, the authors assert that silicon vacancies are generated at the SiO.sub.2 -substrate interface on the well regions where oxynitridation occurs, thus inhibiting lateral Phosphorus diffusion. Increased silicon vacancy concentration causes a decreased silicon interstitial concentration because the product of Si vacancies and Si interstitials is equal to an equilibrium constant. The reduced concentration of self-interstitials in the lateral direction is believed to inhibit lateral diffusion of Phosphorus.
More recently, the importance of scaling parasitic dimensions such as isolation regions and well dimensions has been addressed in Reduction of Lateral Phosphorus Diffusion in CMOS n-Wells, IEEE Transactions on Electron Devices, v. 37, no. 3, March 1990. Lateral diffusion of dopants during drive-in is identified as a primary factor that limits packaging density of semiconductor devices. Lateral diffusion of Phosphorus is reduced by creating silicon interstitial undersaturation in the region where the Phosphorus atoms diffuse laterally, as such Phosphorus atoms diffuse predominantly by interaction with self-interstitials. Lateral diffusion of Phosphorus is controlled by creating vacancy supersaturation arising from the decomposition reaction of SiO.sub.2 ultimately to 2SiO, which results in the consumption of silicon atoms. For an n-well, vacancies are injected only outside of the well region, from the thin oxide, and virtually no vacancies are injected from the thick SiO.sub.2 -Si interface. Therefore, normal Phosphorus diffusion in the vertical direction proceeds, whereas lateral diffusion of Phosphorus into the region underlying the thin oxides is reduced due to the vacancy supersaturation.